Sumit Kumar

Hi, I'm Sumit Kumar, an FPGA Design & Verification Engineer with over 5 years of experience in the VLSI industry.

I specialize in RTL Design (Verilog/SystemVerilog) and Functional Verification using UVM, and I currently work at a FinTech Company, where I design high-speed digital modules for trading systems and smart NICs.

Earlier, I worked as an RTL Design Engineer. In this job, I verified interfaces like SPI, I2C, and AMBA, and built UVM testbenches from scratch. I’ve also worked with Protocols, RISC-V processor testing, and tools like Vivado, Xcelium, and QuestaSim.

I completed my M. Tech in Microelectronics & VLSI Design from NIT Uttarakhand, and I love guiding students and freshers who want to start their journey in the VLSI/FPGA domain. I understand how confusing it can be at the beginning — I’ve been there too!

If you're a student or fresher looking for help in understanding RTL, FPGA flow, or verification basics, I’d be happy to share my knowledge and experience with you.